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畢業(yè)設(shè)計（論文） 譯文及原稿 譯文題目： 一種無線數(shù)據(jù)采集和傳輸系統(tǒng)的設(shè)計 原稿題目： The Design of a Wireless Data Acquisition and Transmission System 原稿出處： CAI Jun，YU Shun-Zheng，LIU Jing-li．The Design of a Wireless Data Acquisition and Transmission System[J]． JOURNAL OF NETWORKS．2009，4（10）：1042-1049． 浙江工業(yè)大學(xué)之江學(xué)院畢業(yè)設(shè)計（論文） 外文翻譯 一種無線數(shù)據(jù)采集和傳輸系統(tǒng)的設(shè)計 【摘要】 在現(xiàn)代無線通信領(lǐng)域主要有一些技術(shù)為無線傳輸網(wǎng)絡(luò)提供解決方法，例如：GSM，CDMA，3G，Wi-Fi。這些方法使得網(wǎng)絡(luò)能夠高效率和高質(zhì)量的工作，但是成本很高。因此要低成本和在沒有基礎(chǔ)設(shè)施或者基礎(chǔ)設(shè)施被破壞的情況下推廣它們是很困難的。根據(jù)這種情況，本論文中數(shù)據(jù)采集和無線傳輸網(wǎng)絡(luò)里的信息終端和無線收發(fā)模塊的關(guān)鍵部件，是依據(jù)nRF905收發(fā)模塊和51系列單片機的原理設(shè)計而成作為核心硬件，此外，結(jié)合目前自組無線網(wǎng)絡(luò)的技術(shù)，可以構(gòu)建一個短距離無線數(shù)據(jù)采集和傳輸網(wǎng)絡(luò)，這個網(wǎng)絡(luò)能夠提供一個工作在ISM（工業(yè)科學(xué)醫(yī)學(xué)）頻段的低功率及高性能的數(shù)據(jù)通信系統(tǒng)。然后提出了一個對無線通信可行的解決方案，這個方案優(yōu)勢在于更強的實時響應(yīng)，更高的可靠性要求和更小的數(shù)據(jù)量。通過軟件和硬件的調(diào)試和實際測量，這個系統(tǒng)在我們的解決方案基礎(chǔ)上運行良好，達到了預(yù)期的目標(biāo)并且已經(jīng)成功的應(yīng)用到無線車輛系統(tǒng)。 【關(guān)鍵詞】 自組網(wǎng)絡(luò)；數(shù)據(jù)采集；傳輸網(wǎng)絡(luò) 1 簡介 在現(xiàn)代無線通信里，GSM，CDMA，3G和Wi-Fi因為其高速和可靠的質(zhì)量而逐漸成為無線數(shù)據(jù)傳輸網(wǎng)絡(luò)的主流解決方案。它們也有高成本的缺點，因此如果廣泛的應(yīng)用，將會引起大量的資源浪費，也不能在小區(qū)域，低速率的數(shù)據(jù)通信中得到提升。多點短距離無線數(shù)據(jù)采集和傳輸網(wǎng)絡(luò)將成為最佳解決方案。此系統(tǒng)支持點對點，點對多點和多點對多點通信系統(tǒng)的發(fā)展。 短距離無線通信可以適應(yīng)各種不同的網(wǎng)絡(luò)技術(shù)，例如藍牙，IEEE802.11，家庭無線網(wǎng)和紅外。與遠距離無線通信網(wǎng)絡(luò)相比，它們的不同之處在于基本結(jié)構(gòu)，應(yīng)用水平，服務(wù)范圍和業(yè)務(wù)（數(shù)據(jù)，語音）。設(shè)計短距離無線通信網(wǎng)絡(luò)的最初目的是為了提供短距離寬帶無線接入到移動環(huán)境或者制定臨時網(wǎng)絡(luò)，這是在移動環(huán)境里互聯(lián)網(wǎng)更深的發(fā)展。短距離無線通信網(wǎng)絡(luò)最主要的優(yōu)勢是更低的成本和更靈活的應(yīng)用。 本文介紹信息終端（單個器件）的硬件和軟件以及多點短距離無線數(shù)據(jù)采集和傳輸網(wǎng)絡(luò)的無線接收模塊的設(shè)計建議，提供一個低功率高性能的工作于ISM（工業(yè)科學(xué)醫(yī)學(xué)）頻段的無線數(shù)據(jù)通信系統(tǒng)。文章剩余部分由如下內(nèi)容組成：在第二部分，我們描述了無線數(shù)據(jù)采集和傳輸系統(tǒng)的通用模塊圖表，第三部分，我們分析此系統(tǒng)硬件設(shè)計的關(guān)鍵技術(shù)，第四部分，介紹系統(tǒng)的軟件設(shè)計，第五部分，展示系統(tǒng)的測試結(jié)果，最后我們在第六部分闡述結(jié)論和進一步的工作。 2 系統(tǒng)實現(xiàn)模型 1．系統(tǒng)模型 作為一個點對多點的多功能無線通信系統(tǒng)，它包含了一個中央監(jiān)控系統(tǒng)和多個遠程終端單元（圖1）。實際上，遠程終端單元是一些在移動過程中可互相通信的移動電臺。另外，中央監(jiān)控系統(tǒng)與遠程終端單元進行雙向通信。 在下一部分，設(shè)計信息終端和控制中心的軟件和硬件上的一些關(guān)鍵部件。 2．相關(guān)模型 本論文中的系統(tǒng)是根據(jù)OSI（國際標(biāo)準(zhǔn)組織）中的OSI/RM模型里的第一層（物理層）和第二層（數(shù)據(jù)鏈路層）而設(shè)計的，如圖2所示。物理層的功能是通過建立電路和專用芯片組完成的。然而通信協(xié)議里的數(shù)據(jù)鏈路層是由軟件來實現(xiàn)的。 3 系統(tǒng)硬件設(shè)計 為了設(shè)計，管理和更新的方便，一些硬件單元和節(jié)點根據(jù)它們的功能和電學(xué)特性被劃分成不同的模型。本設(shè)計以射頻收發(fā)芯片nRF905為核心,以模塊搭建設(shè)計為指導(dǎo)思想,搭建無線溫度采集系統(tǒng),系統(tǒng)主要由數(shù)據(jù)采集模塊和無線傳輸模塊組成。數(shù)據(jù)采集模塊以數(shù)字式溫度傳感器DSl8B20監(jiān)測溫度參數(shù),并將監(jiān)測的溫度參數(shù)簡單處理后通過nRF905無線模塊發(fā)送到接收端口。無線數(shù)據(jù)傳輸模塊通過nRF905芯片進行數(shù)據(jù)收發(fā)處理,nRF905芯片的集成度較高,所需的外圍器件較少,因此整體的電路設(shè)計相對比較簡單點。本設(shè)計給出其與MSP430F449的接口電路設(shè)計和接收端通過電平轉(zhuǎn)換芯片MAX3232與PC機連接。并根據(jù)硬件特性及連接設(shè)計相應(yīng)的軟件流程,并編寫軟件。通過相適應(yīng)的無線傳輸模塊和數(shù)據(jù)采集模塊控制軟件的操控,保證整個硬件系統(tǒng)的流暢運作。系統(tǒng)基本結(jié)構(gòu)中包含無線射頻收發(fā)模塊，控制處理模塊，通用串行接口模塊，數(shù)據(jù)緩沖存儲模塊以及多功能電源管理模塊等。 1．收發(fā)器和接收模塊 在數(shù)據(jù)發(fā)送過程中，數(shù)據(jù)包將被調(diào)制到高頻然后發(fā)送到目標(biāo)無線射頻傳輸模塊，接收過程中，高頻信號通過無線射頻接收模塊又被解調(diào)成原始數(shù)據(jù)包。 NRF905是無線射頻收發(fā)模塊的關(guān)鍵，它的頻率是16兆赫茲的晶體振蕩器。NRF905可以通過印刷式天線接收無線射頻信號，但是為了提高接收機的靈敏度和抗干擾能力，這種模塊也適用外部天線和濾波器電路。 2．控制處理模塊 控制處理模塊包含MCU和外部電路，有兩個功能：一是使所有模塊在其控制下協(xié)調(diào)工作，二是處理和傳輸從接口來的數(shù)據(jù)，例如路由處理，數(shù)據(jù)打包，驗證和重傳請求。 模塊的關(guān)鍵部件MCU是51系列單片機，考慮到工業(yè)功能，WINBOND 78LE546因其在8位CMOS微處理器里較好的容量特性被而被應(yīng)用，與2.4-2.5伏的寬電壓供電，256比特嵌入式RAM，16KB Flash EPROM以及64KB地址空間，四個8位標(biāo)準(zhǔn)I/O接口，一個標(biāo)準(zhǔn)I/O雙串行口相兼容。 SCM的晶體振蕩器頻率是22.1184兆赫茲，電功率為3.3伏適合無線收發(fā)芯片里nRF905的邏輯水平。它的引腳通過與VCC相連受到保護并保持器穩(wěn)定性。MCU與所有模塊的具體連接如表1所示。 4 系統(tǒng)軟件設(shè)計 系統(tǒng)性能的真實取決于其有效性和合理的軟件控制。軟件設(shè)計是在硬件環(huán)境的基礎(chǔ)上開發(fā)一個無線網(wǎng)絡(luò)協(xié)議，為了到達設(shè)計目標(biāo)，這個協(xié)議要有諸如數(shù)據(jù)傳輸，沖突避免，錯誤后重傳以及超時重試的功能。整個網(wǎng)絡(luò)由一個主機和許多分散的終端組成，每個終端必須有一個無線收發(fā)節(jié)點（此系統(tǒng)支持Nrf905單片無線收發(fā)器），整個無線網(wǎng)絡(luò)的任何節(jié)點都有一個唯一認證地址對應(yīng)一個唯一認證終端。為了方便起見，每個確定系統(tǒng)的終端無線收發(fā)器節(jié)點地址都是我們自己設(shè)定的4字節(jié)。 為了提高系統(tǒng)的穩(wěn)定性，協(xié)議被設(shè)置成停止-等待模式。在數(shù)據(jù)鏈路層，發(fā)送過程大概如下：首先，數(shù)據(jù)源發(fā)送一個連接請求道數(shù)據(jù)目標(biāo)，得到數(shù)據(jù)源的響應(yīng)后傳輸數(shù)據(jù)。接著，每一次傳輸都要等待接收方的回應(yīng)。如果響應(yīng)正確，另一次的傳輸才會開始。當(dāng)所有數(shù)據(jù)傳輸完后，數(shù)據(jù)源將發(fā)送一個釋放信道請求，當(dāng)收到接收方的響應(yīng)后傳輸結(jié)束。接收過程如下：在接收方給數(shù)據(jù)源響應(yīng)后將收到數(shù)據(jù)，然后會發(fā)送一個有效或無效的響應(yīng)，直到收到拆除鏈路請求。接下來，保存數(shù)據(jù)且發(fā)送一個響應(yīng)來結(jié)束整個過程。 5 系統(tǒng)測試 任何兩個節(jié)點之間的通信大都可以通過點對點來測試，因此在系統(tǒng)測試過程中，A節(jié)點和B節(jié)點之間的通信模型對測試圖解來說是一個很好的樣本，就像圖10。 閉環(huán)測試電路是通過PC帶雙串口以及兩個RS32口和通信節(jié)點A和B建立起來的。在一個終端，數(shù)據(jù)時通過串口測試輔助工具“串口助手V2.2” 發(fā)送，在另一端，監(jiān)控著返回的數(shù)據(jù)。數(shù)據(jù)通過PC的串口A，RS32口發(fā)送，然后數(shù)據(jù)緩沖，最后成功到達終端無線收發(fā)器模塊。然而，數(shù)據(jù)接收過程是SPI串口，數(shù)據(jù)緩沖，然后RS32口，最后才是PC。在本論文中，根據(jù)以收發(fā)器nRF905和51系列單片機作為核心硬件的原理設(shè)計一個低功耗高性能的無線數(shù)據(jù)通信系統(tǒng)。提出無線數(shù)據(jù)通信一個可行的解決方案，這個解決方案適合于強大的實時響應(yīng)，高可靠性要求和小數(shù)據(jù)量，被廣泛的應(yīng)用于各種領(lǐng)域，例如數(shù)據(jù)通信，環(huán)境監(jiān)測和安全保衛(wèi)系統(tǒng)。我們相信在軟件設(shè)計進一步精煉和提高以后集成和智能通信協(xié)議將會實現(xiàn)。 測試過程中，用數(shù)字示波器監(jiān)測通信節(jié)點A、B，RS32口和SPI口的數(shù)據(jù)傳輸。在接下來的部分，通過分析來自MOSI/SCK和MISO/SCK的信息來驗證系統(tǒng)的正確性。 6 總結(jié) 在本論文中，根據(jù)以收發(fā)器nRF905和51系列單片機作為核心硬件的原理設(shè)計一個低功耗高性能的無線數(shù)據(jù)通信系統(tǒng)。提出無線數(shù)據(jù)通信一個可行的解決方案，這個解決方案適合于強大的實時響應(yīng)，高可靠性要求和小數(shù)據(jù)量，被廣泛的應(yīng)用于各種領(lǐng)域，例如數(shù)據(jù)通信，環(huán)境監(jiān)測和安全保衛(wèi)系統(tǒng)。我們相信在軟件設(shè)計進一步精煉和提高以后集成和智能通信協(xié)議將會實現(xiàn)。 The Design of a Wireless Data Acquisition and Transmission System Abstract—In the field of modern wireless communication, there are mainly some technologies that provide solutions to the wireless data transmission network, such as: GSM, CDMA, 3G, Wi-Fi.These solutions make network work with high efficiency and good quality, but still with high cost. So it was difficulty in popularizing in with low cost and at the circumstance of infrastureless or infrastructure destruction. According to this situation, in this paper, the key components of the Information Terminal and the wireless receiving modules on the data collection and wireless transmission network were designed with the principle of transceiver nRF905 and 51 series of single-chip computer as the core hardware, besides, combining with the current technology on the Wireless Ad Hoc Networks,a short-rang wireless data sampling and transmission network was putting up,which provides a low-powered and high-performance wireless data communication system, works in the ISM (Industrial Scientific Medical )Band.Then,an available solution to the wireless data communications was put forward, and this solution was good at stronger real-time response, higher reliability requirement and smaller data amount. Through software and hardware debugging and actual measuring, this system based on our solution had work well, reached the expected goal and been already successfully applied to Wireless vehicle System.Index Terms—Ad Hoc Network;data acquisition; transmission network. I. INTRODUCTION In modern wireless communication,GSM,CDMA, 3G, and Wi-Fi become the mainstream solution of wireless data transmission network because of their high speed and reliable quality. They also have the shortcomings of high cost, so wider application would cause a great waste of resources, and they cannot be promoted in small regional, low speed data communications.Multi-point short-range wireless data collection and transmission network will be the best solution.The system supports the development of communication system of peer-to-peer, point-to-multipoint, and multipoint-to-multipoint. Short-range wireless communication can adopt different network technologies, such as Bluetooth [1], IEEE802.11 [2],HomeRF [3] and Infrared [4]. Compared with long-distance wireless communication network, they are different in the basic structure, the application level, service range, and business (data, voice). The originalintention of design of short-range wireless communication network is to provide short-distance broadband wireless access to mobile environment or formulation of temporary network, it is the further development of internet in mobile environment. The main advantage of short-range wireless communication network is lower cost and more flexible use. This paper presents the design proposal of hardware and software of information terminal (a machine) and wireless receiver module of multi-point short-range wireless data collection and transmission network, which provides a low-powered and high-performance wireless data communication system, works in the ISM （Industrial Scientific Medical）Band. The remainder of this paper is organized as follows. In Section Ⅱ, we describe the general block diagram of the wireless data acquisition and transmission system. In section Ⅲ, we analyze the key technologies about the system hardware design. In section Ⅳ, the system software design is introduced. In section Ⅴ, the testing results of system is presented. Finally, we present the conclusion and future work in Section Ⅵ. II. SYSTEM IMPLEMENTATION MODEL A. System Model As a point to multi-points multi-mission wireless communication system, it consists of one central monitoring system (CMS) and Multiple Remote Terminal Units (RTU) (figure 1). In fact, this remote terminal unit is some kind of removable stations which can communicate with other stations in the process of motion. Furthermore, the CMS communicate with RTU in bidirectional way. In the next part, some pivotal segment on software and hardware of the information terminal and control center was designed. B. Reference Model The system in this paper is designed based on the first layer (the physical layer) and the second layer (the data link layer) of the architecture of OSI/RM (Open Systems Interconnection Reference Model) that the ISO (International Organization for Standardization) proposed, such as figure 2. The function of the physical layer is finished through constructing the circuit and special chips. Otherwise, communication protocols in the data link layer are realized by software. Ⅲ.THE HARDWARE DESIGN OF THE SYSTEM For the sake of the convenience of design, maintenance and update, some hardware circuit cell and node was divided into some different module according to functional and electric characteristic. There are RF Transceiver module [5], controlling and dealing module, Universal Serial interface module, data buffer and storage module and multifunctional power management module in the basic structure (Figure 2). In the process of sending, the data package should been Modulated with High frequency and sent to object RF Transmitting module, in the process of receiving, the high frequency signal have been demodulated to original data package through the RF receiver module. NRF905 [5] is the key of RF Transceiver module whose frequency is 16MHz Crystal Oscillator. NRF905 can receive the RF signal by Printed Antenna, but this module adopts the external antenna and Filter Circuits in order to improve the receiver sensitivity and anti-jamming ability. B. Controlling and Treating modue The controlling and treating module consists of MCU and external circuit, it have two functions: one made all module’s working under control and harmony; the other function is treating and transmitting the data got from interface, such as router processing, data packaging, verification and repeating request. Module’s key MCU is 51 series microprocessor, and considering the industrial function, the WINBOND was applied in this practical experiment because of it’s good capability in 8-bit CMOS microprocessor, compatibility with 2.4-5.5V wide voltage electric supply, 256Bytes embedded RAM, 16KB Flash EPROM and 64KB addressing space, four 8 Bit standard I/O interfaces, one standard I/O dual serial interface. The Crystal Oscillator frequency of SCM is 22.1184MHz, and the electric power is 3.3V to adapting to nRF905 logical level in wireless transceiver chip. The impending PIN was protected by connecting with VCC to keeping its stability. The specific connection between MCU and all modules is described in TABLAE 1. C. Multifunctional Electric Power Management Module The most remarkable characteristic is compatibility with 8-24V wide voltage electric supply including CMOS power and TTL power, respectively in 5V and 3.3V, which provided all modules with the suitable and stable power. Meanwhile,it means so much in energy source saving because of its electronic switch. The power supply transfer chip C851414 and AS-1117-3.3 is the primary ingredient in this module.The C851414 made the electric voltage transfer from 8V to 24V, then, the AS-1117-3.3 made it from 5V to 3.3V. Furthermore,suitable filter capacitance and inductance was introduced to make power’s ripple characteristic perfect as possible. D. Universal Serial Interface Module The main function of Universal Serial interface module is connecting universal terminal equipment, such as signal output equipment or analog collection equipment with AD transfer. At the same time, it provides entrance to the computer terminal data exchange through universal RS232 serial interface. E. Data Buffer and Storage Module It has two kinds of function, one is data buffer, the other is data storage, respectively performed by 32KByte RAM and 16KByte EEPROM. Data buffer district supervise buffering some temporary data, such as transmit data, waiting data. Data storage district supervise some fixed data memory, such as router data, local host, local address and some renewed data for power-off protective. F. High Frequency Shielding Protecting Moudule In order to prevent electromagnetic interference from environment, circuit in our designing system is protected with metal enclosure. At the same time, preventing the digital circuit interfere from the radio frequency circuit in the system, we placed the two circuits in different isolated bin, such as figure 3. There is a small hole with diameter less than 1/4 wavelength in the metal box side, which is either easy to pass the line or prevent the electromagnetic wave from getting in it. Ⅳ.SYSTEM SOFTWARE DESIGN The realization of system performance depends on its effective and reasonable software control. The design of this software is on the basis of the hardware environment to development a wireless network protocol that have functions as data transmission, avoiding conflict, the retransmission when error occurs, and overtime retry, in order to achieve the design goal. The entire network is composed of a host and many scattered terminals, each terminal must have a wireless transceiver node (this system adopts nRF905 single-chip RF transceiver), any nodes of the entire wireless network has a unique identified address which is composed of an unique identified terminal. For convenience’s sake, each terminal wireless transceiver node addresses of the actual system is set by ourselves (4 bytes). In order to improve the reliability of the system, the protocol is designed as stop-wait mode. In data link layer, the send process is roughly as follow. Firstly, the data sources send a connection request to the data targets, and it will transfer data after the data sources respond. Then wait for response from data target after each transmission. If the response is correct, another transmission will start. After all the data transmission is done, the data source will send a request to release channel resources, the transmission is finished when the response from the target is received. The receive process is as follow: the data target will receive data after give a response to the source, and will give a effective or uneffective response, until receive a demolition request. Then, save the data and send a response to end the entire process. data values are serially transferred, pumped into a shift register and are then internally available for parallel processing. Here we already see an important point, that must be considered in the philosophy of SPI bus systems: The length of the shift registers is not fixed, but can differ from device to device. Normally the shift registers are 8Bit or integral multiples of it. Of course there also shift registers with an odd number of bits. For example two cascaded 9Bit EEPROMs can store 18Bit data. If a SPI device is not selected, its data output goes into a high-impedance state, so that it does not interfere with the currently activated devices. When cascading several SPI devices, they are treated as one slave and therefore connected to the same chip select [5]. In figure 4 the cascaded devices are evidently looked at as one larger device and receive therefore the same chip select. The data output of the preceding device is tied to the data Ⅴ.SYSTEM TESTING Because communication between any two nodes may be tested through point to point, in this system Testing Process, communication model between node A and node B is a good example for testing schematic diagram, just like figure 10. Closed-loop testing circuit is put up through PC with double serial ports and two RS232 ports and communication node A and B. On one terminal, data was sent through serial port testing auxiliary tool “serial port assistant V2.2”, on the other terminal, returning data is monitored. Data is sent through PC’s serial port A, RS232 port, then data buffer and finally wireless transceiver module successively. However, the process of data receiving was SPI serial, data buffer, then RS232 port, finally PC. In t In this paper, a low-powered and high-performance wireless data communication system were designed with the principle of transceiver nRF905 and 51 series of single-chip computer as the core hardware. An available solution to the wireless data communications was put forward, and this solution was good at stronger real-time response, higher reliability requirement and smaller data amount, which is widely applied various fields such as data communications, environmental monitoring and security Guard System. We believe that integrated and intelligent Communication Protocol are realized after software design is refined and improved further.he testing process, digital oscilloscope was also used to monitor the data transfer of communication node A , node B , RS232 port and SPI port. In the following section, information from MOSI/SCK and MISO/SCK was analyzed to verify the system’s Correctness. As a waveform of wireless sending data, figure 11 demonstrate some relations among efficient data, address information and synchronous clock in wireless sending process. Because the receiver address must be designated by the transmit terminal, 4 byte address require to be sent after sending packet. Ⅵ.CONCLUSION In this paper, a low-powered and high-performance wireless data communication system were designed with the principle of transceiver nRF905 and 51 series of single-chip computer as the core hardware. An available solution to the wireless data communications was put forward, and this solution was good at stronger real-time response, higher reliability requirement and smaller data amount, which is widely applied various fields such as data communications, environmental monitoring and security Guard System. We believe that integrated and intelligent Communication Protocols are realized after software design is refined and improved further.TDD-CDMA systems to support asymmetric services by using directional antennas. 10